I am trying to hardware sync the dwm1000 module.
Let me first say that i am aware of the limitations of the sync on the dwm1000 module.
Topic Wired time sync dwm1000 dwm1001 states that is is possible to do a wired sync on this module tho.
I am doing a proof of concept, and for now a meter accuracy is enough. I know i have to sync it at least once a ms to achieve this. This is not a limitation for now and i will go to the dw1000 module in the future.
My question is how do i hardware sync this module?
i think i need One Shot Timebase Reset (OSTR) Mode. The dw1000 user manual states: To configure DW1000 for OSTR mode, the OSTRM bit in the EC_CTRL register is set and the WAIT value is set
to the desired delay value. This is my code to do so, please tell me what i am doing wrong:
HAL_GPIO_WritePin(DW_SYNCP_GPIO_Port, DW_SYNCP_Pin, GPIO_PIN_SET);
Could I ask what device you’re using to setup a Wired sync TDoA RTLS system?
With regards setting up a wired system, please check APS007 on Wired Sync RTLS with the DW1000.
As stated In the original post I am using the dwm 1000. As it is good enough for a proof of concept. I am using keil with stm32cube mx. I did read the note as also stated in the original post
First question - why do you need the clock sync? There are small number of applications/usecases that really need this.
Second - if you do, you need to have some logic to do it, having MCU pin is not enough, the SYNC signal should be synchronized with main 38.4MHz clock (clocking the MCU from the same source also doesn’t provide the accurate timings).
So the minimum circuit should consist of one inverting gate and one D-type flip-flop (you need to clock it on the negative edge of 38.4 clock). Also it’s a good idea to add another flip-flop afterthat to get rid of possible metastable issues.
Depending on the application you may be bounded to have strictly 1 period (26ns) SYNC signal, this means an additional logic.
As an example we have the PDoA kit using this SYNC functionality to synchronize two DW1000 ICs to be able to measure the phase difference of incoming signal - you can use the provided schematic as a reference.
Thanks for your answer! it really helps me understand.
I need to make a proof of concept for a TDOA system that can handle at least 100.000 tags. But for now time is a bit limited, so making the hardware for the dw1000 is not really an option yet. We will use this in the future.
The proof of concept only needs to be accurate to about 1 meter. So i thought of syncing the devices every 1 ms and correcting the clock drift.
The sync is indeed a bit more complex than i thought. Any other way of doing this?
I thought about requesting system time for all anchors at a synchonized 1 ms. And then calculate the rx time according to this 1 ms clock.
Sorry, PoC of "at least 100.000 (one hundred thousand) of Tags?
If you are talking about one “air space”, that means the highest possible datarate of 6.81Mbps and 64/128PLEN, which means roughly 100-180us length for 1 blink message.
in fully slotted TDMA tags, ideal case, you can fit “only” 5-10 thousands of blinks per second into 1 air space.
If you are talking about, say, 20 air spaces (~100 anchors), i.e. less than 5k of blinks per seconds in one air space, then fully scalable Decawave’s TTK1000 TDoA system can do that (or you can have few TTK1000 systems with mutual following synchronizations).