I am struggling with this circuit. I want to generate a pulse signal for an 7-level multilevel inverter. Below is my inverter circuit.
The output I desire is as follows:
All your pulse sources generate 0-1 V signals. You need to change the gain of the E sources that drive the gates to 10 to provide 0-10 V gate drive signals required by the SIC FETs.
forum_inverter_multilevel_7_v1.qsch (28.6 KB)
Please refer to my simulation that I just created. In your schematic, you missed the power supply (Vdd) for the OR-gate.
how about if i want to use SiC Mosfet for switching and replace the switch/diode in S1, S2, S3, S4?
You just replace it with the SiC mosfet model for the switching device, actually.
Be careful, your connection is wrong. The lowside of M1 and M3 shouldn’t be connected. Beside that, you must consider the voltage level for the gate of SiC.