I am attempting to write a utility to calibrate the crystal oscillator trim value for a custom board following Section 8.1.1 of the DW1000 User Guide. I’ve noticed the transmitter configuration steps appear to be formatted incorrectly. This is in dw1000_user_manual_2.13.pdf
Does anyone have a version of the user manual where the steps here are formatted correctly? I can probably interpret it, but want to make sure I am reading it correctly.
Thanks
[hr]
To be more specific, step 1 simply says:
“1. Sub-Register 0x28:00 – RF_CONF”
I’m not sure what to do here. Also, Step 9 appears to be split on two lines, and I think Step 10 is supposed to be the “Enable CW mode” step.
line 1 of the Transmitter Configuration Procedure in the UM section 8.1.1 should be:
Write 0x0009A000 to Sub-Register 0x28:00 – RF_CONF
While line 9&10 should be merged and would become:
9. Write 0x005FFF00 to Sub-Register 0x28:00 – RF_CONF
This will be corrected in our next release of the UM manual
Additional information can be found in our API , example ex_04a_cont_wave. Crystal Trim is also described in Production Application Note APS012 section 3.3.1 Crystal trim optimization
Hello,
what is sub register in line 4 of Transmitter Configuration Procedure (8.1.1 Calibration Method)? the Register file is 0X1E but the sub register is unknown.
line 4 of Transmitter Configuration Procedure:
4. Write an appropriate value to Register file: 0x1E – Transmit Power Control.
Hi
Therr is no subregister. The register is 4 octets. So the values given in table 19&20 could be used.
For more detailed information see aps023 part 1 attached
Hi Leo,
If I’m not mistaken this is not corrected in the current version of the user manual. The current version has a defective step 1 and 9.
I also wonder if the statement in step 2 is correct: Write 0x00000000 to Sub-Register 0x36:04 – PMSC_CTRL1 . Since this clears the reserved bit 24 and the manual states that the reserved bits should be left at their reset states, I am afraid that this will impede DW1000 functionality. Can you confirm whether bit 24 should be cleared, or not?