Hi,
I am trying to make a Voltage dependent capacitor model but I have some troubles and I was wondering if someone could help.
The idea is to vary the capacitance of this capacitor depending on the voltage across its terminals. This can emulate then a MOSFET output capacitance.
My model is actually trying to implement something similar to this.
The problem is probably the wrong syntax of G source.
Hi @lpoma ,
Shortly after I posted the issue, I have found it and fixed it. It now works as expected.
For anyone who might be interested here it is. Run the VD_CAP_test.