I have been debugging a strange issue when in receiving mode with the DW1000 that someone else might have come across.
When in receive, and a frame is received the RXDFR (Receiver Data Frame Ready) bit is set, but the FCS check never fails nor succeeds (RXFCE nor RXFCG is ever set).
The interesting part here is that this causes the chip to never receive a frame again unless the physical reset pin is used (softreset does not help).
Has anyone else seen this and knows what causes it?
I have not been able to find this error condition in the datasheets.
There is not much info you’re giving. What API are you using, example code, for example ex_02a_simple_rx? Are you using auto enable as some of the error events are automatically cleared when using auto rx re-enable.
Maybe check the registers 0x19 (SYS_STATE) and 0x0F (system_Status) . Both registers (and much more) are discriben in APS022 , our debug application note.
Hi Leo, thanks for the input.
We are using a custom driver, but it turned out that the chip was at fault.
After replacing the DW1000 it started working as expected, so most likely it has been shocked sometime during the development process.