I have a weird problem. I wrote my own DW1000 driver (we need a slightly different architecture and interface) based on the public Decawave driver. The initialization and configuration part is nearly the same (just some never-used options were eliminated). At first I would like to test Tx, but it does not work. After init and config, I copy data into TX_BUFFER and set length and others in TX_FCTRL.
According to the SYS_STATUS the transmission begins, preamble is sent, PHR is sent, but frame sent flag will never be true. What may be the problem?
Register dump: Before all: SYS_CFG=0x00441200, SYS_MASK=0x00000000, SYS_STATUS=0x0000000070, SYS_STATE=0x00040000, RF_STATUS=0x09 Start procedure: SYS_CFG=0x00441200, SYS_MASK=0x00000000, SYS_STATUS=0x0000000000, SYS_STATE=0x00010000, RF_STATUS=0x01 Just after TXSTRT: SYS_CFG=0x00441200, SYS_MASK=0x00000080, SYS_STATUS=0x0000000010, SYS_STATE=0x00040001, RF_STATUS=0x09 After 100msec: SYS_CFG=0x00441200, SYS_MASK=0x00000080, SYS_STATUS=0x0000000070, SYS_STATE=0x00040000, RF_STATUS=0x09
UWB Tx fail!
Yes, good point, thank you! I figured out that SAVE command in AON_CTRL messes things up in the init procedure (which may be unnecessary there, but I can’t understand why it causes problem). I noticed that the high rate SPI mode was also not working, this confirms the clock problem…
Finally I’ve found the solution!
I thought that I can SAVE the AON configuration in any time, so I did it on init and also somewhere else. This caused the problem. I see that the original Decawave driver does not SAVE the AON because of WCFG configuration, just stores the configuration bits and save when enters SLEEP mode.
So the conclusion: call AON SAVE just before entering sleep. Use UPL_CFG instead to save AON_CFGx at a random point. (Btw the description in the User Manual is not clear about this SAVE and UPL_CFG command, it is obscure what is the exact difference…)
