For this week’s QSPICE schematic capture, we have two TL494 models built by our friends Edwin Scull and Alexander Bordodynov. They’ve taken slightly different approaches, the Forum thread for this is posted in the first comment, an interesting discussion. Please send any schematic capture submissions to me at tim.mccune@qorvo.com (Schematic Capture Post #025)
Parent.TL494.qsch (24.0 KB)
There is an extra R1 resistor in my model. I apologize. I have now reproduced the schema in the datasheet.
TL494.qsch (34.5 KB)
Parent.TL494.qsch (23.7 KB)
2 Likes
Hi Alexander, many thanks, Tim
Thanks for this model! I am looking at it (almost 3am at night, I should get a life lmao) did you model the voltage offset of the deadtime comparator? I don’t see a voltage source in the schematic file for it. Also I am still learning qspice so I’ll need to figure out how to actually use this circuit as a subcircuit model in another schematic file.
While using this model I found a few issues and will soon publish an improved version.
Something that triggers my autism is the use of devices that can supply power within the IC, So it continues to function even when I kill power to it! I’m replacing the voltage sources with a linear regulator implementation using the opamp model and bandgap diode.
I’m not sure where you got the 3.65V voltage source for the oscillator. The datasheet assumes 3V nominal on the capacitor pin and when I tested a TL494 on a breadboard I found the voltage on the resistor to ground was a bit more than 2V. I’m looking through the datasheet to see if it says anything about this.
This is my take on it so far.
I want the chip to only function at all if there is power applied to it somehow. The current draw in the datasheet is nominal 6mA @ 15VDC and 9mA @ 40V, which maps to a 4mA || 8.3Kohms if I did the math right, not including the additional current draw of the oscillator, logic, and output drive.
I need to learn more about the BJT modeling and and better characterize the oscillator part on a breadboard. I will need to measure the voltage applied to the RT pin and determine the current multiplication factor to apply to the capacitor and fine-tune the current mirror. There are also some interesting dynamics that are noticable at the upper end of the frequency range. The dv/dt rate during the discharge can hint at the current I should use for the schmitt trigger device, and there are also some nonlinearities (BJT saturation?) that causes some anomolies in the ramp wave at the upper end of the supported frequency range.
The error amplifier GBP was increased to the values given in the datasheet. I have not adjusted the slew rate to match the real part yet.