SPICE-based simulators use a variable timestep (e.g. https://groups.io/g/LTspice/topic/finding_the_relationship/105177850).
My understanding is that SPICE employ the Newton-Raphson algorithm to solve nonlinear equations. Unlike PWL-based simulator (PSIM, NL5 etc), they operate in fixed time step as circuit is modeled using linear-segment, where linear models have predictable behavior within a timestep.
The DLL block can modify the timestep in Trunc() and MaxExtStepSize(). However, its primary function is to limit the maximum time of the next step. If the solver necessitates a smaller step size for convergence to a solution meeting error tolerance, it will take the smaller step. As a result, you can only have partial timestep controllability.
In a discussion with @RDunn, he explained the differences between Trunc() and MaxExtStepSize(). Trunc() includes code that projects into the future step. If your next maxstep depends on future considerations (e.g. hypothetical circuit state changes), use Trunc(), this maximum step is referred to as TTOL. Conversely, if your next maxstep is determined by past and current information, perform the operation in MaxExtStepSize().
My point is, no matter what you do, because of how the math works in SPICE-based simulator, it is not possibly to fully control timestep profile as you wish.