Dear all
I designed a high-side source output circuit. I used qspice and ltspice to simulate and analyze the results. I found that LTSpice produced a normal current waveform. However, when I used QSPICE for simulation, the output results were abnormal.
At first, I suspected that it was due to the different models of MOS. I have copied the 2N7002 from LTSPICE into Qspice, but there was no change.
When things are awry, probe a few other points in the circuit.
I you find some clamped at diode-drop type voltage, try something else.
In this case swap of pins labeled VEE VCC removes clamps and then almost works.
However, current draw of IC is high, and operating point is wrong, so the model is still incorrect.
Comments :
It is less common to see a current sense level shift using NMOS part, than PMOS.
PMOS allows a low voltage opamp biased on the high side rail, whilst NMOS needs full rail opamp.
With a generic opamp both NMOS and PMOS (swap IP) simulate to the expected 300uA fine.
