Simulation is a numerical process, and tolerance is expected. There are many .option parameters that affect accuracy and simulation speed. For a fair comparison, both simulations should run from the same netlist, with options set up as closely as possible.
If anyone wants to compare SPICE simulations, they have to be very familiar with the differences in SPICE programs. Qspice and LTspice have different timestep schemes, default parasitic settings for inductors (Qspice with Rpar=INDUCTANCE÷(15.91×GMIN) and LTspice with Rser=1mohms), and different Rser/Rpar arrangements for capacitors, etc… There are devices within SPICE that can behave differently, so it’s advisable not to delve too deeply into comparisons.
For a switching circuit, my suggestion is that you set the maxstep to at least 100 times smaller than the pulse period if you are seeking more precise results.
[1] I modified this Qspice schematic by renaming the voltage source used for current sensing to begin with V instead of I. This modification allows the netlist to run directly in LTspice.
[2] The timestep has been reduced to 0.1us for a more precise timestep scheme.
[3] Another important adjustment is in LTspice: go to Tools > Settings > Hacks > Enable: always default inductors to Rser=0. Unlike LTspice, Qspice set Rser=0 by default.
FullBrigeInverter_QSpice.qsch (36.9 KB)
FullBrigeInverter_QSpice.cir (1.1 KB)
