Question about the sync signal control

I want to use MCU(STM32F407)to gener the sync signal for two dw1000 chips in OSTR mode .
ARE there some limits on the signal begin ? for example the offset of sync start and external clock rising edge.

Hi @hustviewer,

Worth taking a look at the schematics + code of the BetaPDoA Kit from Decawave. It has an HW sync circuit which you are interested in.
I think in the DW1000 DS/UM the requirements to sync circuit are also described.

Thanks for your reply:
I will try it.