I am looking at the platform source code from DW3xxx_XR6.0C_24Feb2022.zip and also various other places, and I find what looks as a grave mistake to me. I hope I’m wrong…
The NRF port has:
decaIrqStatus_t decamutexon(void)
{
/* NRF chip has only 1 IRQ for all GPIO pins.
* Disablin of the NVIC would not be of the best ideas.
*/
decaIrqStatus_t s = nrf_drv_gpiote_in_is_set(current_irq_pin);
if(s)
{
nrf_drv_gpiote_in_event_disable(current_irq_pin);
}
return s;
}
nrf_drv_gpiote_in_is_set() is defined to nrfx_gpiote_in_is_set() which does nrf_gpio_pin_read(), it reads the PIN state (high or low) of the IRQ GPIO. So that means, only if the IRQ is currently active, it will be disabled???
The STM_Nucleo_F429 platform code has:
decaIrqStatus_t decamutexon(void)
{
decaIrqStatus_t s = port_GetEXT_IRQStatus();
if (s)
{
port_DisableEXT_IRQ(); // disable the external interrupt line
}
return s; // return state before disable, value is used to re-enable in decamutexoff call
}
port_GetEXT_IRQStatus() is using EXTI_GetITEnStatus() which uses NVIC->ISER to check wether the Interrupt is enabled. That seems to make more sense.
Now the question is, why does the NRF code work at all?