QPL9065 bypass pins VPD VBYP

RF Solutions RF Low Noise Amplifiers
1
  1. What is the default state of QPL9065 on power up? Both LNAs enabled with bypass off?
  2. I am determining how to control these pins, Vpd and Vbyp. I have 5v TTL. Would Vpd and Vbyp happen to be pulled up internally to 1.8V? Would a simple voltage divider work? I do not plan on changing voltage to these pins rapidly.
  3. Thanks!

Spec sheet indicates these pins are TTL 1.8V.

2

Spec sheet indicates these pins are CMOS 1.8V.

3

The Vpd and Vbyp of QPL9065 are required to be kept at logic low while bring up the Vdd. This is due to the CMOS controller design internally. With such, you can say the default state is LNA enabled with bypass off.

Since the control interface is CMOS circuitry, under normal operation (Vdd >= control Logic high) the control pin’s current will be < 10uA. So that a simple voltage divider could be designed in to convert 5V TTL to 1.8V CMOS logic.

If you apply Vpd and/or Vbyp with logic high before Vdd up, serial resistors are required to limit possible control Pin currents flew through internal high side ESD diodes. In your case, the resistive voltage dividers need to be with higher resistance while keep the same dividing ratio. With this circuit and control configurations, you may say the default state is LNA Power Down and/or Bypass function ON