I am in the process of translating a 3 level converter I did in LTspice 4 years ago. It would be super nice if there were some demo circuits for Qspice that use the Qorvo SiC FET parts with gate drivers. The goal is to make a high efficiency 360V to 800V 8KW power converter. Anything I could see in an example would be great.
Just using a fixed gate drive waveform, the simulation runs fine for 30-120mS, and then comes up with timestep too small once the floating cap starts to approach its target voltage.
I tried the following steps when the “time step too small” error occurred in QSpice:
Uncheck the “Fast (less accurate) Math” option in the Edit>Preferences menu.
Set the “reltol” option to a larger value than the default, and the “trtol” option to a smaller value than the default.
For example,
.options reltol=2m (default=1m), trtol=5 (default=2.5).
Both values should be determined through trial and error.
In LTspice, I used to set error tolerance settings such as reltol, abstol, vntol, and chgtol to values smaller than the default. However, this approach does not seem to work well in QSpice.
