New Feature: View and Drag Schematic Files (.sch) from Symbol & IP Browser

The Symbol & IP Browser now supports showing schematics with the extension .sch in today’s Qspice update.
05/15/2026 Schematic files now show up in the Symbol & IP Browser if the file name extension .sch is used.

For users who build and share their libraries, one thing that seems useful but is missing in SPICE is the ability to drag not only symbols, but also schematics into a schematic window. The difference is that a schematic can preset everything and ease the simulation process—for example, device characteristic templates, switching mode power supply templates, etc. Of course, using a schematic as a template is nothing special, but the capability to drag a schematic from the Symbol & IP Browser can simplify and well-organize this process.

As discussed with Mike, he agreed to add this feature. To use this feature, the extension of the schematic MUST be renamed to .sch.

@physicboy , @marcos.uniovi as you are active in creating libraries for Qspice, I wanted to make sure you are aware of this new feature update.

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Thanks Kelvin for tagging me. That’s nice feature addition.

I do actually hope if we can have subcircuit to be easily added as component symbol.

The one thing that is a bit complicated with symbol is with evaluating the detail circuit (particularly with reading netlist is nowhere as easy as schematic diagram, or perhaps I am just too spoilt with UI).

If Qspice can support component symbol, but then we can see and modify the “sch under the hood” like in Simulink, that will be a superb feature.

@physicboy I am a bit confused. As I know, you use hierarchical blocks for your FRA. Qspice supports hierarchical blocks to be loaded from a library path, as long as you put the hierarchical schematic and symbol into a folder that is directly added to the Symbol & IP Browser. Qspice is capable of searching this folder to link up to the hierarchical schematic (but not search its subfolder, only that direct path); This is the same for having DLL as a library for Ø-Device, where the folder storing the .dll is directly added into the Symbol & IP Browser.

Is the concept of a component symbol different from a hierarchical block?

I think the reason it is less common to share a library like this is that a custom library is generally treated like a predefined module, and custom symbol creators prefer parameters to be modified from the instance parameters instead of allowing others to modify the circuit that easy, as that can permanently change the subcircuit stored in that folder. Of course, netlist can also be modified, but in general someone can modify the netlist they know exactly what they are doing.

Thanks for letting me know. This seems to be a very useful feature. I will try it.

@KSKelvin , In the beginning my FRA are always implemented with subckt, but the newer release under ANR Q-Lib is now supplied by a symbol for easier drag and drop operation

I think to say it simply, is it possible to suggest Mike that we can apply custom symbol drawing on a subcircuit?

I think its comparable with Simulink or PLECS, where you can see some circuit block with a representative shape. But then, you can evaluate the inner working

Is this what you’re looking for? CBlock_Doc/CBlockBasics15.pdf

The only different between hierarchical symbol and subcircuit symbol is its Type. If nothing in Type, it is hierarchical and its 1st attribute link to a .qsch file. If Type is X, it is subcircuit symbol. We can copy hirearchical symbol into symbol viewer, redraw its, and save it as a hierarchical symbol, only necessary item is to make sure it save without anything in its Type in Symbol Properties. It is not necessary to stuck with its grey autogenerated symbol if you copy and paste into symbol viewer and edit its yourself.

Currently the procedure to create hierarchical symbol is in page 27 in this guide
https://github.com/KSKelvin-Github/Qspice/blob/main/Guideline/Qspice%20-%20General%20Reference%20Guide%20by%20KSKelvin.pdf

@physicboy Here is an example of a hierarchical symbol with a custom drawing. This way, we can open the child schematic that contains the circuit, while with the hierarchical symbol drawing customized. Is this what you referred to, or is it still not what you mean regarding Simulink or PLECS?

Parent.ISO-FreqSource.qsch (3.7 KB)
ISO-FreqSource.qsym (923 Bytes)
ISO-FreqSource.qsch (2.0 KB)
dllblock.cpp (4.4 KB)

Thanks a lot @KSKelvin
Ah…correct, thats very nice indeed.

it shall keep the block to remain easy to understand and modify (at least convenient)

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