New Component (C-block): STOP

QSPICE
1

I’ve contributed this new component (STOP) for anyone to use for private or commercial purposes.
image

This component can stop a simulation before the end time specified in the .tran statement. This occurs on the 0 → 1 rising edge of the “in” input.

The advantages are:

  • Shorter simulation execution times.
  • Smaller .qraw file sizes.
  • Faster access to the post-processing phase when using .meas statements.
  • Faster execution of the post-processing phase since the .qraw fie is smaller.
  • Only the current .step is STOPped and the next .step parameter is executed next.
    This C-block is a derivative of the new feature requested of QSpice based on the AbortSim() feature.
    Here is a link to the AbortSim() discussion: Is it possible to stop a simulation step to allow the next step to process without stopping the entire sim?
    This C-block is potentially more useful since you can “STOP” a simulation within a .step WITHOUT exiting the entire simulation (such as with exit(3)). In this case, the next .step parameter is executed. This speeds up the overall multi-step simulation. If there are no stepping, the entire simulation is STOPped.

I’ve included this component as a symbol as well. This potentially makes use of the “Symbols & IP” Browser feature of assigning the directory where this symbol is found. From the “Symbols & IP” Browser, you can drag-n-drop the STOP symbol into your schematic with all the inputs and outputs assigned properly.

image
image296×534 10.8 KB

At this time, if the STOP component is not in the same directory as the schematic, then you need to change the “Library File” field to point to the stop.dll file. [Note: leave off the .dll. This will be automatically added when executing the simulation.]

Here is a simple multi-step simulation using the STOP component to stop only the active step.

image
image1020×688 25.7 KB

Summary
I’ve found this component to be extremely useful. I’ve run a very large stepped simulation that created a 700M+ .qraw file. Using the STOP component to early terminate a step reduced the .qraw file size to 164M+. Using STOP reduced my post-processing time from 280 seconds to 84 seconds.

When this forum allows for uploads of .zip files, I can attach it to this posting.

Len

3 Likes
2

Hi Len

You can upload zip file by adding .txt at the end of your zip file

designfile.zip.txt

3

@physicboy ,
Good cheat. Will do.

Len

4

To all,

Here is the .zip file with a .txt extension.
Once you download the file, remove the .txt extension.

There are 4 files:

  • stop.cpp // C-block source
  • stop.dll // compiled C-block dll
  • stop.qsym // QSpice symbol with the correct port assignments
  • stop_test.qsch // QSpice STOP test simulation

Len
Stop.zip.txt (548.6 KB)

5

@lpoma But you actually don’t need to call .dll for this. Behavioral source with AbortSim() should yield this same performance. If you like a special icon, just create a symbol with embedded .subckt. Just need one .qsym.

image
image1146×523 43.1 KB

image
image1150×520 41.7 KB

6

This is sub-circuit, corresponding symbol is upload for your reference. subckt is embedded to this symbol and just need one file.

.subckt stop in
B1 ¥0 0 V=AbortSim(V(in))
.ends

Qspice/Symbols/Stop.qsym at main · KSKelvin-Github/Qspice

7

@KSKelvin,

You are correct. My STOP component can be replaced with your STOP .qsym symbol file with reference to the AbortSim() in a subckt definition.

Your solution should have the advantage of not needing to change the location of the .dll file in the “Library File” field if not in the same directory as the schematic.

Thank you.

1 Like
8

Len, you could add a counter attribute and counter variable and have your version abort only after n “events.” That might be useful and something that the behavioral source version doesn’t/can’t (AFAIK).

–robert

9

@RDunn ,

I though about doing that. However, I’m in process of creating another C-Block component that can specify “n” times but also define “rise”, “fall” or “cross” (rise or fall) currently called “sim_event”.

The reason why I am choosing to create a separate C-Block for “sim_event” is that I’m also in-process to release a “logger” component that can take snapshots of input data on a trigger to a .csv file. The trigger could be the output from the “sim_event” component.

Len