New Bug: Capacitor Instance Attribute IC=0

@bordodynov , adding comments would help understand what message you want to pass along. I see you added some ESR resistors, and in the body of these posts was specified a few times this matter is not related to serial resistors. The issue at hand is related to what seems to be a conservation of charge rule enforced on capacitor models, with immediate effect on infinite currents. The matter is very visible if the capacitor has an IC property, but the real annoying issue is the variable capacitance that also pushes the currents to infinity. This alone is the main reason why LTspice and QSPICE fails with convergence errors for most of the PSPICE models. It is true if you add resistors you can dull the current spike, but is also true if the voltage on the capacitor is equal with the power supply voltage (as is the case when you do not skip the initial transient bias point calculation) then the current spike should be also zero. If the conservation of charge is not enforced and the variable capacitance is changed conserving the voltage at the capacitor terminals (like any other SPICE simulation program does, except for LTspice and QSPICE), then you have zero current spikes with variable capacitors or after calculating the initial bias point, and all these pesky infinite current spikes and convergence errors will be removed. More details are in the post. Also, it would be great if we have a checkbox with the option to conserve the charge for a variable capacitor, if conserving the charge is so important. Probably I missed the real point you try to make, and indeed you see something there not related to resistors?