But using only VTO and KP parameters in model this does not mean that VDMOS and NMOS ar the same in behaviour? For this
you can try instead of using .model NMOS VDMOS VTO=5 KP=1 use .model NMOS NMOS VTO=5 KP=1 in your two above simulations With Cdg and Withoud Cdg to see If these 2 models defined only with VTO and KP the simulation results with these 2 models gives the same results.
And If so, that’s why I asked when the VDMOS and NMOS/PMOS mosfet becomes different in its behaviour? When do I know that it’s better to use VDMOS model instead of NMOS/PMOS model?