Logic gates problem?

[Cornel]

@KSKelvin

if REF is assigned, the logic reference is at Vss+REF

@KSKelvin

Force the logic level to +1/-1 (I set input buffer with REF=1, where logic threshold is at 0V, you must determine where is logic input threshold).

How to think about this REF associated with logic gates? Could you live more explanation about it? Its a threshold that does Something inside the gates? What does this REF attribute? And this REF attribute has effect only in the case of logic gates, right?