Lis3dh I2C address

Wireless Connectivity Ultra-Wideband
1

Hi,

In DWM1004C sample code, host controller tries to access the lis3dh accelerometer using I2C address 0x32, but the schematic claims that the correct address is 0x33.
What is the correct address? Shouldn’t the sample code just be compiled and run without modifications?

Thanks in advance
Harel

2

Hi Harel,

Both are correct, 0x33 is the read address, 0x32 is used for write operations (LSB controls the data direction).
See Table 16 of LIS3DH datasheet (page 25, 6.1.1)

3

Hello Harel

This is due to the way I2C works. I2C uses the last bit of the 8-bit address to indicate a read or write operation.

The schematic shows the read address (last bit high), the address in the firmware has this bit set to 0 by default. Both are correct.

The actual 7-bit address is 0011001b or 0x25. From the LIS3DH datasheet section 6.1.1:

The Slave ADdress (SAD) associated to the LIS3DH is 001100xb. The SDO/SA0 pad can
be used to modify the less significant bit of the device address. If the SA0 pad is connected
to the voltage supply, LSb is ‘1’ (address 0011001b) else if SA0 pad is connected to ground,
the LSb value is ‘0’ (address 0011000b).

In firmware it makes more sense to use the 8-bit address instead.

4

Thanks Seppe & alec!