IRQ Stay High

Wireless Connectivity Ultra-Wideband
,
1

Hi all,

I’m working on a STM32F205, and I’m using a double range algorithm with interrupts.
Sometimes (I think especially when more than 1 tag communicate to 1 anchor), the IRQ stay high, and I get stuck in

do
{
    if (port_deca_isr != NULL)
        port_deca_isr();

} while (port_CheckEXT_IRQ() == 1);

In dwt_isr(), I go through any event :

if(status & SYS_STATUS_RXFCG)

{
…
}
if(status & SYS_STATUS_TXFRS)
{
…
}
if(status & SYS_STATUS_ALL_RX_TO)
{
…
}
if(status & SYS_STATUS_ALL_RX_ERR)
{
…
}

Do you have already got something like this ?
Any idea to manage this ?

Thanks,

Xavier

2

You need to read SYS_STATUS, for your own use, and then write SYS_MASK with zero to clear the interrupt assertion by the DW1000.

3

For each case, I clear the corresponding event bit :

if(status & SYS_STATUS_RXFCG)
{
    dwt_write32bitreg(SYS_STATUS_ID, SYS_STATUS_ALL_RX_GOOD); // Clear all receive status bits

…
}

// Handle TX confirmation event
if(status & SYS_STATUS_TXFRS)
{
    dwt_write32bitreg(SYS_STATUS_ID, SYS_STATUS_ALL_TX); // Clear TX event bits

…
}

// Handle frame reception/preamble detect timeout events
if(status & SYS_STATUS_ALL_RX_TO)
{
    dwt_write32bitreg(SYS_STATUS_ID, SYS_STATUS_RXRFTO); // Clear RX timeout event bits

…
}

// Handle RX errors events
if(status & SYS_STATUS_ALL_RX_ERR)
{
    dwt_write32bitreg(SYS_STATUS_ID, SYS_STATUS_ALL_RX_ERR); // Clear RX error event bits

…
}

This code comes from the Decawave API…

Le mardi 21 mars 2017 16:32:52 UTC+1, Mark Odell a écrit :
You need to read SYS_STATUS, for your own use, and then write SYS_MASK with zero to clear the interrupt assertion by the DW1000.

On Tue, Mar 21, 2017 at 11:09 AM, xaviervause xavie...@gmail.com wrote:
Hi all,

I’m working on a STM32F205, and I’m using a double range algorithm with interrupts.
Sometimes (I think especially when more than 1 tag communicate to 1 anchor), the IRQ stay high, and I get stuck in

do
{
    if (port_deca_isr != NULL)
        port_deca_isr();

} while (port_CheckEXT_IRQ() == 1);

In dwt_isr(), I go through any event :

if(status & SYS_STATUS_RXFCG)

{
…
}
if(status & SYS_STATUS_TXFRS)
{
…
}
if(status & SYS_STATUS_ALL_RX_TO)
{
…
}
if(status & SYS_STATUS_ALL_RX_ERR)
{
…
}

Do you have already got something like this ?
Any idea to manage this ?

Thanks,

Xavier

4

Don’t bother writing to sys_status. Just zero sys_mask and the DW1000 will de-assert IRQ. Later, when you want to send or receive another frame write your sys_mask value to sys_status and then sys_mask to retrigger the interrupt system.

5

Hi,

I can explain a little bit better and give more register values.
Everything goes well, but at one time, I get SYS_STATUS_ID = 0x6F030423.

It’s strange because, when I look at the signification, I get:

					    0x6F030423

#define SYS_STATUS_IRQS 0x00000001UL /* Interrupt Request Status READ ONLY /
#define SYS_STATUS_CPLOCK 0x00000002UL / Clock PLL Lock /
#define SYS_STATUS_TXPRS 0x00000020UL / Transmit Preamble Sent /
#define SYS_STATUS_LDEDONE 0x00000400UL / LDE processing done /
#define SYS_STATUS_RXRFSL 0x00010000UL / Receiver Reed Solomon Frame Sync Loss /
#define SYS_STATUS_RXRFTO 0x00020000UL / Receive Frame Wait Timeout /#define SYS_STATUS_RXSFDTO 0x04000000UL / Receive SFD timeout /
#define SYS_STATUS_RFPLL_LL 0x01000000UL / RF PLL Losing Lock /
#define SYS_STATUS_CLKPLL_LL 0x02000000UL / Clock PLL Losing Lock /
#define SYS_STATUS_RXSFDTO 0x04000000UL / Receive SFD timeout /
#define SYS_STATUS_HPDWARN 0x08000000UL / Half Period Delay Warning /
#define SYS_STATUS_AFFREJ 0x20000000UL / Automatic Frame Filtering rejection /
#define SYS_STATUS_HSRBP 0x40000000UL / Host Side Receive Buffer Pointer */

==> there is almost all events (TX, RX good, Timeout, Error).

Every event is handled, but after, it loops in dwt_isr because irq stay high…

Someone has an explanation ?

Mark, could you give me code example to explain what I’m supposed to do ?
I try dwt_write32bitreg(SYS_STATUS_ID, SYS_STATUS_MASK_32); when I loop, but I stay stuck in

in the forcetrxoff() -> mask = dwt_read32bitreg(SYS_MASK_ID) ; --> dwt_readfromdevice(regFileID,regOffset,4,buffer); --> readfromspi(cnt, header, length, buffer); --> while((SPIx->SR & SPI_FLAG_RXNE) == (uint16_t)RESET);

Thanks,

6

Hi

I think you have some bytes mixed up. The 0x6F03 are the two LSBs … please check your SPI …

i.e. 0x6F =
#define SYS_STATUS_RXPRD 0x00000100UL /* Receiver Preamble Detected status /
#define SYS_STATUS_RXSFDD 0x00000200UL / Receiver Start Frame Delimiter Detected. /
#define SYS_STATUS_LDEDONE 0x00000400UL / LDE processing done /
#define SYS_STATUS_RXPHD 0x00000800UL / Receiver PHY Header Detect /
#define SYS_STATUS_RXDFR 0x00002000UL / Receiver Data Frame Ready /
#define SYS_STATUS_RXFCG 0x00004000UL / Receiver FCS Good */

and

0x03 =

#define SYS_STATUS_IRQS 0x00000001UL /* Interrupt Request Status READ ONLY /
#define SYS_STATUS_CPLOCK 0x00000002UL / Clock PLL Lock */

Zoran

7

It works during a very long time.
How is it possible to have bytes mixed ?

For example, when I get a correct message, I have 0x80806FF3.
Isn’t good ?

I just got another stuck, and this time, SYS_STATUS_ID = 0xFFFFFFFF !

8

0x80806FF3 - this looks ok,

status of 0xFFFFFFFF - this looks as either you are reading when DW is in SLEEP, or you have SPI issues… if your SPI is not 100% then all bets are off…

Z

9

You are getting garbage back from your SPI read of SYS_STATUS. 0x6F030423 is junk, the 0x6F03 should be in the bottom half-word and the 0x0423 is junk. Check your SPI bus signals and be sure you are properly framing your transactions with SPI_SS.

Are you telling me that when you write zero to SYS_MASK the IRQ line stays high? Then I think your SPI write is failing. Or are you inferring that the IRQ is still high because of your bogus SYS_STATUS read? Get a scope on that SPI bus and the IRQ line.