In the QPL9095 device application, there is signal overshoot during switching under TDD mode. How can this issue be resolved?

RF Solutions RF Low Noise Amplifiers
1

In the QPL9095 device application, there is signal overshoot during switching under TDD mode. How can this issue be resolved?

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Here are some suggestions to help resolve the issue:

  1. The QPL9095 Vsd pin is a CMOS logic pin, so there may not be much you can do in relation to the TDD control input. Adding a small capacitor on the control pin combined with a small series resistor to slow the turn-on transition slightly can be effective and reduce overshoot.
  2. Important to minimize inductance in the supply path to the LNA by keeping leads and PCB tracks from the power supply to the amplifier as short as possible. Use wide, thick PCB traces to reduce stray inductance which can cause voltage spikes.
  3. Place decoupling capacitors as close as possible to L1 which should be close to the Vdd pin. Use a large 1uF-10uF capacitor and a 1nF ceramic.
  4. Adjust the value of L1 to see what effect this component has. Dependent on the frequency you are operating you may be able to reduce this inductor value slightly without impacting gain.
  5. I haven’t tried this myself, but adding an RC snubber network between Vdd and ground can dampen ringing.
  6. Ensure a high-quality ground plane to minimize parasitic inductance and capacitance. Make sure you have plenty of ground vias under the LNA package. You can check the vias used on the QPL9095 eval board layout.
  7. What is on the QPL9095 input? Any input impedance mismatch could cause issues. You could try adding a small resistive pad on the input and see if this helps.