Hello guys,
I’m trying to integrate a signal with idt, a no-zero initial condition, and a reset condition.
Everything works fine with idt function, but what sounds strange to me is that every time the reset kick in, the entire integral is resetted again at the initial condition, and not 0.
Is this intented to be like this?
Is there any way to use the initial condition just at the very initial point?
Thanks in advance!
I’m trying to upload the plot, but it continues to give 422 error;
That worked, thanks!
Still, I don’t know if this behaviour is intended or not…
Anyway, right now is ok, thanks again
Yes, you’re right; in Ltspice though you can use idtmod and it seems to behave correctly.
In fact, pasting from ltspice I had to switch to idt and opening this topic!
I see… in addition to @ivan1 idea, you can setup a voltage source to force whatever initial voltage profile you want over time. PWL source may be one of the best source to force initial value and follow with 0V reset. Hope you have a work around for your simulation.
