Getting a bias error in ACT43750

RF Solutions RF Power Amplifiers
1

Hi,
I have been working on ACT43750, After i power up getting a bias error. Without enabling anything, I have read the status register getting the register values as below
0x00 = 0x0D
0x01 = 0x00
0x02 = 0x00
0x03 = 0x00

And my output of the pins as follows
across BT50 and VD = 4.68
LSR = 4.9V
v12 = 11.87V
V50 = 28V
VG = 0.017V
GV5= 5V
comp pin = 1.059V
GSW = 0.001
GREF = 0.019V
PG = 0.003V
V5 = 4.995 V
NTC = 2.498 V
HSGU - <500mv
HSGD - <500mv
LSGU - 4.5V
LSGD - 4.5V

And my schematics

act43750-1
act43750-11646×885 113 KB

I made the following modifications: removed R363 and R377, and shorted R345 and R346 to tie ENG and ENCAL to GND. The ENTX pin is connected to an MCU GPIO (through SHDN_MAIN pin), which I am holding LOW. I also tried enabling the REGG block via software by setting the EN_REGG bit in register 0x08.Despite these changes, the Bias Error persists and VG remains stuck at 0.017 V.

Now, kindly help me to get VG = - 2.1V.

Regards,
Santhosh.

2

Could you please e-mail appsupport@qorvo.com stating your company name and location and someone will be in touch to help you resolve this issue. What PA are you trying to bias?

1 Like
4

Hi,
I have mailed to support about this on August 28, 2026, at 5:08 AM UTC. There’s no response from them. Is it possible to contact them in other ways…

Regards,
Santhosh

5

Sorry for the delay. Has anyone been in touch yet? What is your location?

6

Hi,
I’m from Jeanuvs located in Guindy, Chennai, India. And I got response from syambabu at the Indian branch. He said he would check and will update it soon.
Regards,
Santhosh.

7

OK. Thanks for the update.