Fatal Error: Can't Allocate Enough Bytes for a Phase Margin Test

Those links provided by Kelvin are Qspice based public repository by user.

Which part seems laborious?
What is your prior simulation experience so far? and for how long?

*honestly, I also dont really enjoy learning how other do something. Thus, I have my own design repo.

This part (that is a tad excessive):

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Off and on for a few years. I have used LTSpice mainly and some Simplis just recently. Python for compensator design if you count that as simulator also (step response and bode plots mainly).

Which simulator you use mainly depends on the task you handle and your budget. I cannot recall there is free PWL simulator. For SPICE, LTspice and Qspice both handle switching circuit, and both created by Mike Engelhardt, and both are free, and with community support.
Ideal Switches in QSPICE - QSPICE - Qorvo Tech Forum

Frequency response analysis (whether calls FRA or .bode), is generally time consuming, as the frequency range you interest normally much lower than switching frequency, and as a result, require long simulation time. So, @physicboy said it is quite common people need hours to simulate that for a complex system.

Just in your case, as crossover is somewhere 100kHz, you just don’t have to down to 1Hz to waste a lot of simulation time and memory storage there. Generally, 2 decade before crossover and 1 decade after crossover is good enough.

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Thank you. Good to know.