DW3000 OSTR Problem

Wireless Connectivity Ultra-Wideband
1

I’m testing dw3000 ostr feature, I read the systime, then send a sync signal to dw3000, and then read systime again, but it seems that dw3000 systime clock can’t be reset after getting a sync signal, codes listed as following:


device_set_sync(Sync_Mode_Ostr, 33);
port_set_sync_en(1);
port_set_syncclear(1);
port_set_sync(1);
port_set_sync(0);
port_set_sync_en(0);
port_set_syncclear(0); 
device_set_sync(Sync_Mode_Off, 0);

static void device_set_sync(sync_mode_e mode, uint8_t wait)
{
    decaIrqStatus_t stat;
    stat = decamutexon();
    uint16_t reg;
    switch (mode)
    {
    case Sync_Mode_Ostr:
    {
        reg = dwt_read16bitoffsetreg(EC_CTRL_ID, 0x0);
        reg &= EC_CTRL_OSTS_WAIT_BIT_MASK; // clear timer value, clear OSTRM
        reg |= EC_CTRL_OSTR_MODE_BIT_MASK;
        reg |= ((((uint16_t)wait) & 0xff) << 3); // set new timer value
        dwt_write16bitoffsetreg(EC_CTRL_ID, 0x0, reg);
        break;
    }
    case Sync_Mode_Off:
    {
        reg = dwt_read16bitoffsetreg(EC_CTRL_ID, 0x0);
        reg &= EC_CTRL_OSTS_WAIT_BIT_MASK; // clear timer value, clear OSTRM
        dwt_write16bitoffsetreg(EC_CTRL_ID, 0x0, reg);
        break;
    }
    default:
    case Sync_Mode_Osts:
        break;
    }
    decamutexoff(stat);
}