Hello Qorvo team and community,
We are developing firmware on nRF52833 with a DW3000-class UWB transceiver and an external front-end module Siliconwave SW8112QF (PA/LNA + switch). We have ~100k units on order and are blocked on firmware release until we resolve RF path control with the external FEM.
SDK and Driver Info:
- Nordic SDK: nRF5 SDK 17.1.0
- UWB Driver: DW3XXX Device Driver Version 06.00.14 (DRIVER_VERSION_HEX 0x060014)
Symptom
On our DW33110 (DW3000) hardware, when we enable the “PA / high-power” path, UWB TX no longer works (no usable air activity / upper layers report failure).
The same firmware image on QM33110W hardware does not show this failure.
We have ruled out simple EN_VDDRF / RF rail timing by varying delays; behavior does not improve.
What we believe is involved
- dwt_setlnapamode() with bits such as DWT_LNA_ENABLE, DWT_PA_ENABLE, DWT_TXRX_EN (per deca_device_api.h).
- DW3000 GPIO mux for external control: SDK documents GPIO5 as EXTTXE (TX/PA enable) and GPIO6 as EXTRXE (RX/LNA enable), using DW3000_GPIO_PIN5_EXTTXE and DW3000_GPIO_PIN6_EXTRXE.
- Fine-grain TX sequencing: API notes state PA use may require dwt_setfinegraintxseq(0) before enabling PA.
- SW8112QF requires ENT/ENR not both high (forbidden state); TX vs RX modes are defined by ENT/ENR levels.
What we have already tried (software)
- Adjust EN_VDDRF (RF FEM supply enable) delays before/after assert – no recovery.
- dwt_setfinegraintxseq(0) before LNA/PA mode setup.
- Explicit dwt_setgpiomode / dwt_setgpiodir to route GPIO5/6 to EXTTXE/EXTRXE and set as outputs (in MCPS reset() path).
- FiRa stack uses dw_conf.lnapamode = DWT_TXRX_EN in our project.
Questions for Qorvo
Q1. Official recommended sequence to use an external PA/FEM with DW3000: order of dwt_initialise, dwt_setfinegraintxseq, dwt_setlnapamode, dwt_configuretxrf, and first TX/RX.
Q2. Which dwt_setlnapamode bitmask is correct for a typical FEM with separate TX and RX enables (e.g. SW8112QF ENT/ENR): DWT_TXRX_EN only, or DWT_LNA_ENABLE | DWT_PA_ENABLE | DWT_TXRX_EN?
Q3. GPIO programming: Must dwt_setgpiomode always be called for GPIO5/6 before dwt_setlnapamode, or does the driver set mux automatically when LNA/PA mode is enabled? Any register-level reference (e.g. GPIO_MODE REG:05:00, MSGP5/MSGP6) for DW3000 vs QM331xx?
Q4. Known differences between DW3000 and QM33110W regarding external FEM control pins or default GPIO strapping that could explain “works on QM33110W, fails on DW33110” with the same firmware?
Q5. Any application note or EVK schematic snippet for DW3000 + external PA/LNA that matches ENT/ENR style FEMs?
What we can provide if needed
- Schematic snippets for DW33110 vs QM33110W RF path (DW3000 RF to SW8112QF to antenna).
- Scope captures of GPIO5/GPIO6 (or packaged ENT/ENR) during TX/RX.
- Short log of device ID, dwt_initialise return, and first failed TX.
We would greatly appreciate authoritative guidance from Qorvo so we can lock the FEM control sequence and ship firmware for our pending production run.
Thank you in advance.
Best regards,
Ryan