DW1000 CIR data reading

Wireless Connectivity Ultra-Wideband
1

I am having different results of the CIR data depending on whether I read all 4064 bytes from register 0x25 at once or if I read the complex numbers (4 bytes) step by step (actually I read 5 bytes per number because the 1st byte is to be discarded according to the user manual).
Does anybody else see this happing in their code?

This is my algorithm for reading each value one by one:

for idx in range(0, 992):
	raw_cir_data = read(reg_addr=0x25, sub_reg_addr=idx * 4, len=5, spi_cs=PIN_CS, spi=spi)
	low_byte_real = raw_cir_data[1]
	high_byte_real = raw_cir_data[2]
	low_byte_imag = raw_cir_data[3]
	high_byte_imag = raw_cir_data[4]
	real = int.from_bytes([high_byte_real, low_byte_real], byteorder="big", signed=True)
	imag = int.from_bytes([high_byte_imag, low_byte_imag], byteorder="big", signed=True)

or everything at once:

raw_cir_data = read(reg_addr=0x25, sub_reg_addr=0x00, len=992 * 4 + 1, spi_cs=PIN_CS, spi=spi)[1:]
2

Hi @maxG ,

I think this is because you’re discarding the first byte at each simple in a loop.
You need to discard only the first byte of the register according to the user manual.

Thanks,
Wassim

3

Actually, the problem was that the RX Clock needs to be set to PLL before reading the accumulator. I have not seen this being documented in the User Manual :frowning:

                PMSC_CTRL0 = read(reg_addr=0x36, sub_reg_addr=0x00, len=4, spi_cs=PIN_CS, spi=spi)
                PMSC_CTRL0[0] |= ~(1 << 2)  # Force RX clock from PLL
                PMSC_CTRL0[0] |= (1 << 3)
                PMSC_CTRL0[0] |= (1 << 6)  # Force Accumulator Clock Enable
                PMSC_CTRL0[1] |= (1 << 7)  # Accumulator Memory Clock Enable
4

I did these configurations, but I still get zeros from the accumulator memory!