Drift of internal clock generators


we are trying to synchronize two DW1000 chips that share common accurate external 38.4MHz clock source.

Is there any information that is published about internal clock generators drifts or their accuracy over time? We want to synchronize them as rarely as possible but in the same time keep independent timestamp counters as close as possible to common 0.
Currently we see linear sync drift between two DWM1000 modules but we presume that the most of it is caused by on board oscillator. We would like to confirm this hunch so that we don’t have to design experimental hardware to prove it.

Thank you,