Hi,
I was experimenting with DLL block co-simulation with SPICE elements.
- Let there be two inputs in1, in2, and one output out=in1+in2.
The code is given below:
extern "C" __declspec(dllexport) void behav1_x1(void **opaque, double t, union uData *data)
{
double in1 = data[0].d; // input
double in2 = data[1].d; // input
double &out = data[2].d; // output
// Implement module evaluation code here:
out = in1+in2;
}
When this block is simulated alone the results were correct. However, if I terminate output node with a {x} Ohm resistor to GND, and simulate it again with .step param x , then the V(out) varies with x !!.
The netlist of erroneous circuit goes here:
Ø´X1 «a´d b´d» «out1´d» «» behav1_X1
V1 a 0 1
V2 b 0 2
R1 out1 0 {x}
.op
.step param x 1 100 5
.end
Being a new user I am not able to attach the .QSCH file. May know if I am making any mistake here ?
Thanks.