Delayed Pulse Train for Conceptual Logic in Qspice

[KSKelvin]

In PWL simulators, there is normally a digital / logic delay block. For example, Time Delay (Logic) in PSIM or Pulse Delay in PLECS.
Such a device would not be implemented in hardware, but is used to prototype conceptual logic. In the past, engineers used the B-source delay(x,y,z) function to achieve an equivalent simulation setup in SPICE. However, this is a memory-inefficient and computationally heavyweight function, resulting in much slower simulation speeds compared to PWL simulators.

As Qspice offers DLL (C++) block, as discussed with Mike Engelhardt, a DelayedPulseTrain.cpp (.dll) was developed and is in the Qspice Demo directory. The idea is simply to memorize input pulse toggle times and recreate the pulse from memory. As a result, this is a memory-efficient and computationally lightweight DLL.
Revision History: 07/22/2026 Added an example of a digital pulse train delay.

File > Open Demo… > DelayedPulseTrain.qsch

Example of Phase-Shifted Full-Bridge Inverter
This will benefit conceptual simulation. As in power electronics, many of us tend to use SPICE as a replacement for expensive PWL simulators. Logic delay is a critical key that has been missing so far. But with DelayedPulseTrain, we can have a memory-efficient and computationally lightweight digital delay block.
I prepared a phase-shifted full-bridge inverter which uses DelayedPulseTrain for simulation. Since DelayedPulseTrain.dll is in the Qspice demo directory, any DLL in the demo directory can be loaded by Qspice directly. In this case, I redrew a custom symbol to make everything look good, and this schematic can be run directly in Qspice.

example(DelayedPulseTrain).Phase-Shifted-Full-Bridge.qsch (16.7 KB)
download KSKelvin DelayedPulseTrain.qsym from Github

This simulation runs 500 pulses, and the total elapsed time is less than 0.2 seconds.
And if I replace DelayedPulseTrain with the B-source delay(x,y,z), the total elapsed time increases to 10 seconds. I also uploaded this delay function example so that you can compare it on your computer. (**compare with fastmath disable, i.e. QSPICE80.exe)

example(DelayFunction).Phase-Shifted-Full-Bridge.qsch (15.5 KB)

[physicboy]

Quick question.

I will guess if the DLL implementation is by using Array to record the time for the target delayed edge.

I am curious if there is a limit on how many pulses the Cblock can accurately delay?

I did similar concept for PWM deadtime. Anyway, in that case I only need to store 1 delayed edge timing.

[KSKelvin]

You can review the source code in the Demo directory; normally, this is the complete path.

C:\Program Files\QSPICE\Examples\delayedpulsetrain.cpp

Well, my submission used a buffer array and to circular it. Eventually, of course, Mike, being a master, created something completely different and beyond my understanding. I still need time to digest how exactly it works. His work uses dynamic memory, only necessary memory are created as according to Mike.

The major reason I need this block in Qspice is that this DLL is in the Qspice root directory, so we don’t have to compile custom .cpp file—which company IT normally blocks. However, digital delay is essential if we need something comparable to a PWL simulator.

[archbugaboo]

Hello KSKelvin

Have you tried with a tline, instead? VCCS + TLINE + R, values of 1 for both Vccs and R, Z0=1, Td=td for tline. The disadvantage is that the tline is considered analogic and will convolve the transitions (add 4 tline instead of 1 in there and see what I mean; imposing a timestep helps but, defeats the purpose). Just another option.

Vlad

[KSKelvin]

Tline automatically limits maxstep to Td/50; as a result, the entire simulation will slow down. I still remember when Qspice was first launched in 2023, Mike didn’t implement the delay() function, so at that time, I used Tline, similar as you proposed to terminate it with Z0. Mike opposes the idea of using delay() for switching signals, and in the very beginning, he didn’t implement delay() to prevent people from abusing its use, as was done in LTspice. But later, he added delay(x,y,z) with the third parameter z to release the memory buffer.

Since I need to boost the total elapsed time to be comparable to a PWL simulator without writing a custom DLL, that is why discussed with Mike to created this DelayedPulseTrain. It has worked very well in my recent project.