Custom modeling capabilities

Good afternoon,
I am a Senior compact modeling engineer in Nexperia. I got an access to early beta of QSPICE. I want to understand capabilities of adding custom models to simulation, especially with selfheating of power devices. Is it possible to do that another way than using behavioural sources (as it is in LTspice ) ? C++ interface looks promising, but I am not sure that we can create model with analog behaviour for multiterminal devices (maybe I am wrong, I saw videos with Mike and he generated some analog behavior, but there are no examples of more complex analog devices). Could you please explain that in more details?
Thank you in advance, George.

Yea, as I guess you are aware, the normal way to model self heating is to write a B-source that outputs current according to dissipated power, have that drive a RC circuit to model the thermal time constant, and readout the temperature as the voltage on the RC circuit, using that as an argument in the B-sources that define the device electrical behavior. This would be a subcircuit approach.

I could probably use the C++ interface to work and it would be faster and easier and more robust, but I have have to ensure that the .dll sees enough time steps since it would be a quasistatic approximation.

–Mike

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Hi Mike,
Yes, but with increasing complexity of equations describing device the convergence becomes worse, that we have already seen in ours the most advanced models. The c++ code would be more robust and reliable way to do that.

Also, recently new open source Verilog - A compile appeared (Open VAF) , that allows to describe device in that format, do you have a plan to implement something like this in future?

Regards, George

Probably eventually, but right now I’m working on a related matter that is maybe more useful.

–Mike

Thank you Mike, I will convert our model to using in comparison with LTspice (it shows best performance among free SPICE solvers)

Regards, George

Good afternoon Mike!
Are there any updates regarding the custom modelling capabilities (Verilog-A/Analog C++ interface)?
Thank you in advance, George.