Hi everybody,
using pulse voltage sources V1[0:3] connected to a bus trial[0:3] I tried out bus notation as known to me from LTSpice. The transient simulation ran, but I was unable to probe a net. (I did that because before that I had tried to build a counter in verilog and display its output but I failed as well.)
How would a bus be noted in QSPICE and how would a signal be probed in the waveform viewer?
I am thankfull for each reply.
Helmut
Hello Helmut,
if I understood your question correctly, you have something like the circuit below.
Just place some bus taps (right mouse click) and give it a valid name.
If you fail to catch a valid signal from the bus, the bus tap will stay red.
The bus tap signals can be probed like other signals.
Best regards, Perry
That helped, thank you very much!