Adding VCD $dumpvars to Verilated code requires verilator command line invocation option --trace

I would like to create a VCD dump file from the “verilated” code. My $dumpvars is being ignored because I need to pass somme command line options to verilator.

How can I add verilator options such as “verilator --trace …” so that I can save a VCD file? or any other verilator command line options into the QSPice flow?

I am using a slightly modified version of the PID temperature control simulation and added some $dumpvars. This code simulates OK, but I cannot add a VCD dump.

module pid_verilog5_x8 (
input real prop,
input real diff,
input real integ,
input reg clk,
input real vcc,
input real kp,
input real kd,
input real ki,
output real vpid
);

initial begin
$dumpfile(“QSPICE_VCD_DUMP.vcd”);
$dumpvars(0, pid_verilog5_x8 );
// $monitor("%t | a = %d ", $time, vpid);
end

always @(posedge clk)
begin
// $display(“out, %f, prop,%f, diff, %f, integ, %f, kp, %f, kd, %f, ki, %f”, vpid, prop, diff, integ, kp, kd, ki);
assign vpid =(vcc)- (kp)*(prop)- (kd) (diff) - (ki)(integ);

end
endmodule

-Info: pid_verilog5_x8.v:15: $dumpvar ignored, as Verilated without --trace

Thanks

MIke V