* TLV9002 - Rev. C * Created by Paul Goedeke; May 01, 2018 - Revised by GPAMPS Team; 2021-06-10 * Created with Green-Williams-Lis Op Amp Macro-model Architecture * Copyright 2018 by Texas Instruments Corporation ****************************************************** * MACRO-MODEL SIMULATED PARAMETERS: ****************************************************** * OPEN-LOOP GAIN AND PHASE VS. FREQUENCY WITH RL, CL EFFECTS (Aol) * UNITY GAIN BANDWIDTH (GBW) * INPUT COMMON-MODE REJECTION RATIO VS. FREQUENCY (CMRR) * POWER SUPPLY REJECTION RATIO VS. FREQUENCY (PSRR) * DIFFERENTIAL INPUT IMPEDANCE (Zid) * COMMON-MODE INPUT IMPEDANCE (Zic) * OPEN-LOOP OUTPUT IMPEDANCE VS. FREQUENCY (Zo) * OUTPUT CURRENT THROUGH THE SUPPLY (Iout) * INPUT VOLTAGE NOISE DENSITY VS. FREQUENCY (en) * INPUT CURRENT NOISE DENSITY VS. FREQUENCY (in) * OUTPUT VOLTAGE SWING vs. OUTPUT CURRENT (Vo) * SHORT-CIRCUIT OUTPUT CURRENT (Isc) * QUIESCENT CURRENT (Iq) * SETTLING TIME VS. CAPACITIVE LOAD (ts) * SLEW RATE (SR) * SMALL SIGNAL OVERSHOOT VS. CAPACITIVE LOAD * LARGE SIGNAL RESPONSE * OVERLOAD RECOVERY TIME (tor) * INPUT BIAS CURRENT (Ib) * INPUT OFFSET CURRENT (Ios) * INPUT OFFSET VOLTAGE (Vos) * INPUT COMMON-MODE VOLTAGE RANGE (Vcm) * INPUT OFFSET VOLTAGE VS. INPUT COMMON-MODE VOLTAGE (Vos vs. Vcm) * INPUT/OUTPUT ESD CELLS (ESDin, ESDout) ****************************************************** .subckt TLV9002 IN+ IN- VCC VEE OUT ****************************************************** * MODEL DEFINITIONS: .model BB_SW VSWITCH(Ron=50 Roff=1e12 Von=700e-3 Voff=0) .model ESD_SW VSWITCH(Ron=50 Roff=1e12 Von=250e-3 Voff=0) .model OL_SW VSWITCH(Ron=1e-3 Roff=1e9 Von=900e-3 Voff=800e-3) .model OR_SW VSWITCH(Ron=10e-3 Roff=1e9 Von=1e-3 Voff=0) .model R_NOISELESS RES(T_ABS=-273.15) ****************************************************** I_OS ESDn MID 3P I_B 33 MID 5P V_GRp 58 MID 180 V_GRn 59 MID -180 V_ISCp 52 MID 42 V_ISCn 53 MID -42 V_ORn 41 VCLP -1.22 V11 57 40 0 V_ORp 39 VCLP 1.22 V12 56 38 0 V4 29 OUT 0 VCM_MIN 79 VEE_B -100M VCM_MAX 80 VCC_B 100M I_Q VCC VEE 60U V_OS 22 33 396.11U XVOS_VCM 21 22 VCC VEE VOS_SRC_0 C30 23 24 15.92U R85 24 MID R_NOISELESS 30K R84 24 23 R_NOISELESS 10K R83 23 MID R_NOISELESS 1 GVCCS10 26 MID 25 MID -1 C29 27 MID 19.89F R82 25 27 R_NOISELESS 10K R81 25 28 R_NOISELESS 70K R80 28 MID R_NOISELESS 1 GVCCS9 28 MID 24 MID -3.8 GVCCS4 23 MID CL_CLAMP 29 -87 R79 30 MID R_NOISELESS 1 XU1 31 MID MID 30 VCCS_LIM_ZO_0 R78 31 MID R_NOISELESS 101 C22 31 26 15.92F R65 31 26 R_NOISELESS 10K R64 26 MID R_NOISELESS 1 R63 29 30 R_NOISELESS 400K XCLAWn MID VIMON VEE_B 32 VCCS_LIM_CLAW-_0 Xe_n ESDp 33 VNSE_0 Xi_nn ESDn MID FEMT_0_0 Xi_np MID 33 FEMT_0_0 S5 VEE ESDp VEE ESDp S_VSWITCH_1 S4 VEE ESDn VEE ESDn S_VSWITCH_2 S2 ESDn VCC ESDn VCC S_VSWITCH_3 S3 ESDp VCC ESDp VCC S_VSWITCH_4 C28 34 MID 1P R77 35 34 R_NOISELESS 100 C27 36 MID 1P R76 37 36 R_NOISELESS 100 R75 MID 38 R_NOISELESS 1 GVCCS8 38 MID 39 MID -1 R74 40 MID R_NOISELESS 1 GVCCS7 40 MID 41 MID -1 C25 42 MID 25F R69 MID 42 R_NOISELESS 1MEG GVCCS6 42 MID VSENSE MID -1U C20 CLAMP MID 151.6N R68 MID CLAMP R_NOISELESS 1MEG XVCCS_LIM_2 43 MID MID CLAMP VCCS_LIM_2_0 R44 MID 43 R_NOISELESS 1MEG XVCCS_LIM_1 44 45 MID 43 VCCS_LIM_1_0 Rdummy MID 29 R_NOISELESS 40K R61 MID 46 R_NOISELESS 273.3609 C16 46 47 1.1018N R58 47 46 R_NOISELESS 100MEG GVCCS2 47 MID VEE_B MID -258.98M R57 MID 47 R_NOISELESS 1 R56 MID 48 R_NOISELESS 273.3609 C15 48 49 1.1018N R55 49 48 R_NOISELESS 100MEG GVCCS1 49 MID VCC_B MID -258.98M R54 MID 49 R_NOISELESS 1 R49 MID 50 R_NOISELESS 337.4K C14 50 51 591.7F R48 51 50 R_NOISELESS 100MEG G_adjust 51 MID ESDp MID -44.81M Rsrc MID 51 R_NOISELESS 1 XIQPos VIMON MID MID VCC VCCS_LIMIT_IQ_0 XIQNeg MID VIMON VEE MID VCCS_LIMIT_IQ_0 C_DIFF ESDp ESDn 1P XCL_AMP 52 53 VIMON MID 54 55 CLAMP_AMP_LO_0 SOR_SWp CLAMP 56 CLAMP 56 S_VSWITCH_5 SOR_SWn 57 CLAMP 57 CLAMP S_VSWITCH_6 XGR_AMP 58 59 60 MID 61 62 CLAMP_AMP_HI_0 R39 58 MID R_NOISELESS 1T R37 59 MID R_NOISELESS 1T R42 VSENSE 60 R_NOISELESS 1M C19 60 MID 1F R38 61 MID R_NOISELESS 1 R36 MID 62 R_NOISELESS 1 R40 61 63 R_NOISELESS 1M R41 62 64 R_NOISELESS 1M C17 63 MID 1F C18 MID 64 1F XGR_SRC 63 64 CLAMP MID VCCS_LIM_GR_0 R21 54 MID R_NOISELESS 1 R20 MID 55 R_NOISELESS 1 R29 54 65 R_NOISELESS 1M R30 55 66 R_NOISELESS 1M C9 65 MID 1F C8 MID 66 1F XCL_SRC 65 66 CL_CLAMP MID VCCS_LIM_4_0 R22 52 MID R_NOISELESS 1T R19 MID 53 R_NOISELESS 1T XCLAWp VIMON MID 67 VCC_B VCCS_LIM_CLAW+_0 R12 67 VCC_B R_NOISELESS 1K R16 67 68 R_NOISELESS 1M R13 VEE_B 32 R_NOISELESS 1K R17 69 32 R_NOISELESS 1M C6 69 MID 1F C5 MID 68 1F G2 VCC_CLP MID 68 MID -1M R15 VCC_CLP MID R_NOISELESS 1K G3 VEE_CLP MID 69 MID -1M R14 MID VEE_CLP R_NOISELESS 1K XCLAW_AMP VCC_CLP VEE_CLP VOUT_S MID 70 71 CLAMP_AMP_LO_0 R26 VCC_CLP MID R_NOISELESS 1T R23 VEE_CLP MID R_NOISELESS 1T R25 70 MID R_NOISELESS 1 R24 MID 71 R_NOISELESS 1 R27 70 72 R_NOISELESS 1M R28 71 73 R_NOISELESS 1M C11 72 MID 1F C10 MID 73 1F XCLAW_SRC 72 73 CLAW_CLAMP MID VCCS_LIM_3_0 H2 37 MID V11 -1 H3 35 MID V12 1 C12 SW_OL MID 100P R32 74 SW_OL R_NOISELESS 100 R31 74 MID R_NOISELESS 1 XOL_SENSE MID 74 36 34 OL_SENSE_0 S1 23 24 SW_OL MID S_VSWITCH_7 H1 75 MID V4 1K S7 VEE OUT VEE OUT S_VSWITCH_8 S6 OUT VCC OUT VCC S_VSWITCH_9 R11 MID 76 R_NOISELESS 1T R18 76 VOUT_S R_NOISELESS 100 C7 VOUT_S MID 1P E5 76 MID OUT MID 1 C13 VIMON MID 1N R33 75 VIMON R_NOISELESS 100 R10 MID 75 R_NOISELESS 1T R47 77 VCLP R_NOISELESS 100 C24 VCLP MID 100P E4 77 MID CL_CLAMP MID 1 R46 MID CL_CLAMP R_NOISELESS 1K G9 CL_CLAMP MID CLAW_CLAMP MID -1M R45 MID CLAW_CLAMP R_NOISELESS 1K G8 CLAW_CLAMP MID 42 MID -1M R43 MID VSENSE R_NOISELESS 1K G15 VSENSE MID CLAMP MID -1M C4 44 MID 1F R9 44 78 R_NOISELESS 1M R7 MID 79 R_NOISELESS 1T R6 80 MID R_NOISELESS 1T R8 MID 78 R_NOISELESS 1 XVCM_CLAMP 81 MID 78 MID 80 79 VCCS_EXT_LIM_0 E1 MID 0 82 0 1 R89 VEE_B 0 R_NOISELESS 1 R5 83 VEE_B R_NOISELESS 1M C3 83 0 1F R60 82 83 R_NOISELESS 1MEG C1 82 0 100e-9 R3 82 0 R_NOISELESS 1T R59 84 82 R_NOISELESS 1MEG C2 84 0 1F R4 VCC_B 84 R_NOISELESS 1M R88 VCC_B 0 R_NOISELESS 1 G17 VEE_B 0 VEE 0 -1 G16 VCC_B 0 VCC 0 -1 R_PSR 85 81 R_NOISELESS 1K G_PSR 81 85 48 46 -1M R2 45 ESDn R_NOISELESS 1M R1 85 86 R_NOISELESS 1M R_CMR 21 86 R_NOISELESS 1K G_CMR 86 21 50 MID -1M C_CMn ESDn MID 5P C_CMp MID ESDp 5P R53 ESDn MID R_NOISELESS 1T R52 MID ESDp R_NOISELESS 1T R35 IN- ESDn R_NOISELESS 10M R34 IN+ ESDp R_NOISELESS 10M .MODEL S_VSWITCH_1 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=100M) .MODEL S_VSWITCH_2 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=100M) .MODEL S_VSWITCH_3 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=100M) .MODEL S_VSWITCH_4 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=100M) .MODEL S_VSWITCH_5 VSWITCH (RON=10M ROFF=1T VON=10M VOFF=0) .MODEL S_VSWITCH_6 VSWITCH (RON=10M ROFF=1T VON=10M VOFF=0) .MODEL S_VSWITCH_7 VSWITCH (RON=1M ROFF=1T VON=500M VOFF=100M) .MODEL S_VSWITCH_8 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=100M) .MODEL S_VSWITCH_9 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=100M) .ENDS TLV9002 * .SUBCKT VOS_SRC_0 V+ V- REF+ REF- E1 V+ 1 TABLE {(V(REF+, V-))} = +(0, 0.8E-3) +(1, 0.8E-3) +(1.3, 0) +(5.5, 0) E2 1 V- TABLE {(V(V-, REF-))}= +(-0.7, -2E-4) +(-0.5, -2E-4) +(-0.4, 0) +(5.5, 0) .ENDS VOS_SRC_0 * .SUBCKT VCCS_LIM_ZO_0 VC+ VC- IOUT+ IOUT- .PARAM GAIN = 100 .PARAM IPOS = 35E3 .PARAM INEG = -35E3 G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)} .ENDS * .SUBCKT VCCS_LIM_CLAW-_0 VC+ VC- IOUT+ IOUT- G1 IOUT+ IOUT- TABLE {ABS(V(VC+,VC-))} = +(00.0000, 0.00001) +(14.0000, 0.000379) +(28.0000, 0.000877) +(37.3333, 0.001382) +(37.8000, 0.00142) +(38.7333, 0.001493) +(39.6667, 0.001583) +(40.6000, 0.001703) +(41.5333, 0.00191) +(42.0000, 0.00204) .ENDS VCCS_LIM_CLAW-_0 * .SUBCKT VNSE_0 1 2 .PARAM FLW=10 .PARAM NLF=115 .PARAM NVR=27 .PARAM GLF={PWR(FLW,0.25)*NLF/1164} .PARAM RNV={1.184*PWR(NVR,2)} .MODEL DVN D KF={PWR(FLW,0.5)/1E11} IS=1.0E-16 I1 0 7 10E-3 I2 0 8 10E-3 D1 7 0 DVN D2 8 0 DVN E1 3 6 7 8 {GLF} R1 3 0 1E9 R2 3 0 1E9 R3 3 6 1E9 E2 6 4 5 0 10 R4 5 0 {RNV} R5 5 0 {RNV} R6 3 4 1E9 R7 4 0 1E9 E3 1 2 3 4 1 .ENDS * .SUBCKT FEMT_0_0 1 2 .PARAM FLWF=0.001 .PARAM NLFF=23 .PARAM NVRF=23 .PARAM GLFF={PWR(FLWF,0.25)*NLFF/1164} .PARAM RNVF={1.184*PWR(NVRF,2)} .MODEL DVNF D KF={PWR(FLWF,0.5)/1E11} IS=1.0E-16 I1 0 7 10E-3 I2 0 8 10E-3 D1 7 0 DVNF D2 8 0 DVNF E1 3 6 7 8 {GLFF} R1 3 0 1E9 R2 3 0 1E9 R3 3 6 1E9 E2 6 4 5 0 10 R4 5 0 {RNVF} R5 5 0 {RNVF} R6 3 4 1E9 R7 4 0 1E9 G1 1 2 3 4 1E-6 .ENDS * .SUBCKT VCCS_LIM_2_0 VC+ VC- IOUT+ IOUT- .PARAM GAIN = 11.15E-3 .PARAM IPOS = 0.352 .PARAM INEG = -0.352 G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)} .ENDS * .SUBCKT VCCS_LIM_1_0 VC+ VC- IOUT+ IOUT- .PARAM GAIN = 1E-4 .PARAM IPOS = .5 .PARAM INEG = -.5 G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)} .ENDS * .SUBCKT VCCS_LIMIT_IQ_0 VC+ VC- IOUT+ IOUT- .PARAM GAIN = 1E-3 G1 IOUT- IOUT+ VALUE={IF( (V(VC+,VC-)<=0),0,GAIN*V(VC+,VC-) )} .ENDS * .SUBCKT CLAMP_AMP_LO_0 VC+ VC- VIN COM VO+ VO- .PARAM G=1 GVO+ COM VO+ VALUE = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)} GVO- COM VO- VALUE = {IF(V(VIN,COM)V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)} GVO- COM VO- VALUE = {IF(V(VIN,COM)10E-3 | V(OLP,COM)>10E-3),1,0)} .ENDS * .SUBCKT VCCS_EXT_LIM_0 VIN+ VIN- IOUT- IOUT+ VP+ VP- .PARAM GAIN = 1 G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VIN+,VIN-),V(VP-,VIN-), V(VP+,VIN-))} .ENDS *