Initializing... lmh: LMH_UARTRX_Init()... hal: UART: Init start. hal: UART: Init done. dwm_factory_reset(). hal: UART: Tx 2 bytes: 0x1300 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 1 bytes: 0x13 lmh: UART: Received all 1 bytes, within 21.51 ms OK Check Tx&Rx: OK Wait 2000 ms for node to reset. lmh: LMH_UARTRX_DeInit()... lmh: LMH_UARTRX_Init()... Done dwm_cfg_get(&cfg) hal: UART: Tx 2 bytes: 0x0800 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 3 bytes: 0x082008 lmh: *** ERROR *** HAL_UART: RET_VAL type wrong: 8 Check Tx&Rx: Fail dwm_cfg_tag_set(&cfg_tag) hal: UART: Tx 4 bytes: 0x05025204 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 1 bytes: 0x05 hal: UART: Rx 1 bytes: 0x02 lmh: UART: Received all 2 bytes, within 37.31 ms OK Check Tx&Rx: OK dwm_reset() hal: UART: Tx 2 bytes: 0x1400 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 1 bytes: 0x52 hal: UART: Rx 1 bytes: 0x04 lmh: UART: Received all 2 bytes, within 19.24 ms OK Check Tx&Rx: OK Wait 1500 ms for node to reset. dwm_cfg_get(&cfg) hal: UART: Tx 2 bytes: 0x0800 lmh: rx started, timeout period changed to 18 ms hal: *** ERROR *** UART: HAL_UART_Rx err_no: -1 hal: UART: Rx 3 bytes: 0x082008 lmh: *** ERROR *** HAL_UART: RET_VAL type wrong: 8 Check Tx&Rx: Fail dwm_cfg_tag_set(&cfg_tag) hal: UART: Tx 4 bytes: 0x05025204 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 1 bytes: 0x05 hal: UART: Rx 1 bytes: 0x02 lmh: UART: Received all 2 bytes, within 37.73 ms OK Check Tx&Rx: OK dwm_reset() hal: UART: Tx 2 bytes: 0x1400 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 1 bytes: 0x04 hal: UART: Rx 1 bytes: 0x14 lmh: UART: Received all 2 bytes, within 29.17 ms OK Check Tx&Rx: OK Wait 1500 ms for node to reset. dwm_cfg_get(&cfg) hal: UART: Tx 2 bytes: 0x0800 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 3 bytes: 0x082008 lmh: *** ERROR *** HAL_UART: RET_VAL type wrong: 8 Check Tx&Rx: Fail dwm_cfg_tag_set(&cfg_tag) hal: UART: Tx 4 bytes: 0x05025204 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 1 bytes: 0x05 hal: UART: Rx 1 bytes: 0x02 lmh: UART: Received all 2 bytes, within 36.61 ms OK Check Tx&Rx: OK dwm_reset() hal: UART: Tx 2 bytes: 0x1400 lmh: rx started, timeout period changed to 18 ms hal: *** ERROR *** UART: HAL_UART_Rx err_no: -1 hal: UART: Rx 1 bytes: 0x04 hal: UART: Rx 1 bytes: 0x14 lmh: UART: Received all 2 bytes, within 19.49 ms OK Check Tx&Rx: OK Wait 1500 ms for node to reset. dwm_cfg_get(&cfg) hal: UART: Tx 2 bytes: 0x0800 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 3 bytes: 0x082008 lmh: *** ERROR *** HAL_UART: RET_VAL type wrong: 8 Check Tx&Rx: Fail dwm_cfg_tag_set(&cfg_tag) hal: UART: Tx 4 bytes: 0x05025204 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 1 bytes: 0x05 hal: UART: Rx 1 bytes: 0x02 lmh: UART: Received all 2 bytes, within 34.53 ms OK Check Tx&Rx: OK dwm_reset() hal: UART: Tx 2 bytes: 0x1400 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 1 bytes: 0x52 hal: UART: Rx 1 bytes: 0x04 hal: UART: Rx 1 bytes: 0x14 lmh: *** ERROR *** HAL_UART: RET_VAL type wrong: 82 Check Tx&Rx: Fail Wait 1500 ms for node to reset. dwm_cfg_get(&cfg) hal: UART: Tx 2 bytes: 0x0800 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 3 bytes: 0x082008 lmh: *** ERROR *** HAL_UART: RET_VAL type wrong: 8 Check Tx&Rx: Fail dwm_cfg_tag_set(&cfg_tag) hal: UART: Tx 4 bytes: 0x05025204 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 1 bytes: 0x05 hal: UART: Rx 1 bytes: 0x02 lmh: UART: Received all 2 bytes, within 35.63 ms OK Check Tx&Rx: OK dwm_reset() hal: UART: Tx 2 bytes: 0x1400 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 1 bytes: 0x52 hal: UART: Rx 1 bytes: 0x04 hal: UART: Rx 1 bytes: 0x14 lmh: *** ERROR *** HAL_UART: RET_VAL type wrong: 82 Check Tx&Rx: Fail Wait 1500 ms for node to reset. dwm_cfg_get(&cfg) hal: UART: Tx 2 bytes: 0x0800 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 3 bytes: 0x082008 lmh: *** ERROR *** HAL_UART: RET_VAL type wrong: 8 Check Tx&Rx: Fail dwm_cfg_tag_set(&cfg_tag) hal: UART: Tx 4 bytes: 0x05025204 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 1 bytes: 0x05 hal: UART: Rx 1 bytes: 0x02 lmh: UART: Received all 2 bytes, within 34.60 ms OK Check Tx&Rx: OK dwm_reset() hal: UART: Tx 2 bytes: 0x1400 lmh: rx started, timeout period changed to 18 ms hal: UART: Rx 1 bytes: 0x04 hal: UART: Rx 1 bytes: 0x14 lmh: UART: Received all 2 bytes, within 28.15 ms OK Check Tx&Rx: OK Wait 1500 ms for node to reset.