User Manual v2.18

DW1000 User Manual v2.18 has a change regarding register 0x2A:0B-TC_PGDELAY, but not much explanation why the change was made.
First Section says that:
“TC_PGDELAY is set to 0xC5 by default, which is the incorrect value for channel 5. This value should be set to 0xC0 before proceeding to use the default configuration. Please see Sub-Register 0x2A:0B – TC_PGDELAY for further information.”
But then that “further information” again recommends the value 0xB5 and not 0xC0 as was said in Can anyone help with why this change was made? Does it only apply to some new versions of the DW1000 chip, or is it simply that 0xB5 has been found to be a better default and it should be used across the board? And Section was just accidentally not updated?

It also seems that 0x28:0C-RF_TXCTRL for channel 5 has been updated to a new value although the change log does not reflect that. The same question: Is the new value simply a result of new better understanding, or does it only apply to some new chips?


Thanks for pointing this out. 0xB5 is the correct new recommended value, using this value maximises the spectral bandwidth, resulting in more power for the channel.


0xB5 for 500 MHz in channel 5?? in our test we got 0xDC for 450 MHz. which is the correct value for 500 MHz

As stated in the UM - Recommended values are given in Table 40 below; note however that these values may need to be tuned for spectral regulation compliance depending on external circuitry.

Thank you!
I assume that the same applies to the new value of 0x28:0C-RF_TXCTRL for channel 5, meaning that an improvement was found and that should replace the previous value.
The latest DW1000 device driver SW v5.01 still has the old values for both of these registers, but I assume they will be updated in the next version.

Just to be explicit, you are saying that the latest published PG_DELAY value for channel 5 in Table 40, 0xC0, is wrong, and that the old recommended value of 0xB5 should be used instead, correct?

For users of the certified DWM1001C module, what value should be used? I don’t see a place in OTP where this value is stored during manufacture (unlike other calibrated settings such as power level, which are calibrated and stored in OTP for the module).

With DWM1001C, the pg_delay reference value is stored in OTP at the address 0x01E, byte [2].

The table below shows the full OTP memory map for DWM1001C: