Timer A not generating PWM signal on DRH4/DRL1 DRH3/DRL0 pins

Hi victor.tinoco,

Lets verify whether there’s a hardware issue by running our PAC FOC code with your PAC5524EVK. This will serve as a simple sanity check.

Follow these steps:

  1. Flash our “PAC55xx FOC Application FW” to your EVK. The only configuration needed is selecting your board in the “config_board.h” file. You can download here: PAC5524 - Qorvo
  2. Open GUI, located in the pac_foc/resources folder
  3. Select COM port.
  4. Click on “Write all Parameters” There’s no need to configure motor parameters.
  5. Now, without a motor connected, click on motor enable.
  6. You should see the message: “PWM Saturated” in the GUI status window. At this point you should be able to see the high/low side gate drive signals with the complementary dead time in between them.

However, If you receive an “OC Fault”, this indicates the board is damaged.