Sleep, Wakeup and AON Memory Array read problem

I want to restore configs such as Channel Number, MeanPrf, Datarate, PCode and etc. after waking up dw1000, but it doesn’t restore the former configs.

The steps I took are as followed:

1. Set Channel to 2 and other paramters, then print configs.
2. Make dw1000 enter sleep
  2.1 Set SAVE bit in AON_CTRL sub regsiter(0x2C:02) of AON register to 1
  2.2 Set UPL_CFG bit in AON_CTRL sub regsiter(0x2C:02) of AON register to 1 and then set it to 0
  2.3 Set SLEEP_EN bit in AON_CFG0 sub regsiter(0x2C:06) of AON register to 1
  2.4 same with 2.2
(Now the device entered sleep mode)
3. Wakeup dw1000 using WAKEUP_PIN
4. Print current configs

But now, they are not the ones before entering sleep.

I suspect that it is the problem of saving, maybe dw1000 doesn’t copy configs. Because I followed the steps Figure 28 shows to read AON Memory Array which are as followed:

1. Make the SPI clock frequency less than 3MHz.
2. Write Address to access into AON_ADDR sub regsiter(0x2C:04) of AON register
3. Set DCA_ENAB bit in AON_CTRL sub register(0x2C:02) of AON register to 1
4. Set DCA_READ bit in AON_CTRL sub register(0x2C:02) of AON register to 1
5. Read Result data from AON_RDAT sub register(0x2C:03) of AON, then print it.

But whatever before or after SAVE bit setting, the result is always 0. After waking up, it’s also 0.

Here, I have another question. Why AON_RDAT register has only 1 octet? If I want to get PAN Identifier and Short Address that is 4 octets in 0x03, which octet will be save in AON_RDAT register?

Here are the part of source codes:

/* UPL_CFG: 1bit */
int phySetUplCfg(int val)
{
  unsigned long reg;
  dwSpiRead(dwm, AON, AON_CTRL_SUB, &reg, LEN_AON_CTRL);
  BITS_FIELD_SET(&reg, UPL_CFG_OFFSET, UPL_CFG_LEN, val);
  dwSpiWrite(dwm, AON, AON_CTRL_SUB, &reg, LEN_AON_CTRL);

  return 0;
}

/* SAVE: 1bit */
int phySetSave(int val)
{
  unsigned long reg;
  dwSpiRead(dwm, AON, AON_CTRL_SUB, &reg, LEN_AON_CTRL);
  BITS_FIELD_SET(&reg, SAVE_OFFSET, SAVE_LEN, val);
  dwSpiWrite(dwm, AON, AON_CTRL_SUB, &reg, LEN_AON_CTRL);
    
  return 0;
}

/* SLEEP_EN: 1bit */
int phySetSleepEn(int val)
{
  unsigned long reg;
  dwSpiRead(dwm, AON, AON_CFG0_SUB, &reg, LEN_AON_CFG0);
  BITS_FIELD_SET(&reg, SLEEP_EN_OFFSET, SLEEP_EN_LEN, val);
  dwSpiWrite(dwm, AON, AON_CFG0_SUB, &reg, LEN_AON_CFG0);
    
  return 0;
}

void phyAonConfigUpload()
{
  phySetUplCfg(1);
  phySetUplCfg(0);
}

int phySleep()
{
  phySetSave(1);
  phyAonConfigUpload();
  phySetSleepEn(1);
  phyAonConfigUpload();
  return 0;
}

/* using WAKE_PIN to wakeup
   time:  delay time, ms */
int wakePhy(unsigned int time)
{
  GPIO_InitTypeDef GPIO_InitStruct;
  memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitTypeDef));
  // Enable GPIO used for WAKE_PIN as open collector output
  GPIO_InitStruct.Pin = GPIO_PIN_1;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);

  HAL_GPIO_WritePin(GPIOB, GPIO_PIN_1, 1);    
  HAL_Delay(time);   /* delay time * 1ms, need at least 500us */
  HAL_GPIO_WritePin(GPIOB, GPIO_PIN_1, 0);
  return 0;
}

unsigned int phyAonRead(unsigned char addr)
{
  unsigned int res = 0, reg = 0;
  dwSpiWrite(dwm, AON, AON_ADDR_SUB, &addr, LEN_AON_ADDR);
  BITS_FIELD_SET(&reg, DCA_ENAB_OFFSET, DCA_ENAB_LEN, 1);
  dwSpiWrite(dwm, AON, AON_CTRL_SUB, &reg, LEN_AON_CTRL);
  BITS_FIELD_SET(&reg, DCA_READ_OFFSET, DCA_READ_LEN, 1);
  dwSpiWrite(dwm, AON, AON_CTRL_SUB, &reg, LEN_AON_CTRL);
  wSpiRead(dwm, AON, AON_RDAT_SUB, &res, LEN_AON_RDAT);
  reg = 0;
  dwSpiWrite(dwm, AON, AON_CTRL_SUB, &reg, LEN_AON_CTRL);
  return res;
}

And here are logs:

set_log_debug 1

set_ext_addr 0 0 0 0 0 0 1 1

test_tx_mode

get_reg 3 0
  0 Reg 3, size 0: ffffffff

aon_read 0
  1 address 0 is 0x0

aon_read 1
  2 address 1 is 0x0

aon_read 2
  3 address 2 is 0x4

aon_read 3
  4 address 3 is 0x4

print_trx_vars
  5 Channel 2, MeanPrf 3, Datarate 2, Preamble Code 10, Repetition 1, RepetitionExt 1
  6 RXWTOE 0, RXFWTO 0, RXAUTR 1, RXDRXB 0
  7 SysStatus[4] 2
  8 SYS/TX/RX states 5, 0, 5, SYS status 800002

phy_sleep

wake_phy 0 10

aon_read 0
  9 address 0 is 0x0

aon_read 1
 10 address 1 is 0x0

aon_read 2
 11 address 2 is 0x0

aon_read 3
 12 address 3 is 0x0

print_trx_vars
 13 Channel 5, MeanPrf 2, Datarate 2, Preamble Code 4, Repetition 1, RepetitionExt 1
 14 RXWTOE 0, RXFWTO 0, RXAUTR 0, RXDRXB 0
 15 SysStatus[4] 0
 16 SYS/TX/RX states 1, 0, 0, SYS status 800002

Anyone can help?
Thanks very much.
Bihao.