Need to modify DWM1001 (DEV) antenna delay?

Wireless Connectivity Ultra-Wideband
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1

Hello,

I have a custom SDS-TWR scheme running on the nRF52832 on multiple DWM1001-DEV boards. The accuracy is very wrong though and I’m trying to eliminate the possibility of the antenna delay.

I was making an assumption that the preprogrammed non-zero value in the OTP of the DWM1001 is likely correct. (I don’t have it in front of me but it was something like 0x4058 or ~16,000 ticks) My application reads the OTP space and programs the antenna delays that are written there in the RX and TX antenna delay registers.

However, my two anchors sitting next to each other on the table, ~0.5m apart, are calculating a distance of things on the order of 75m or so! Is it possible that the preprogrammed OTP ANTDLY needs to be adjusted by +50%, or is it more likely that I have something wrong in my setup? I would normally blame myself, but the error seems to be linear, it seems like a flat antenna delay change would fix it.

Thanks!

2

Hi Lincoln,

The antenna delay is calibrated during manufacturing and written on the OTP, so it should be accurate enough using the OTP value.

I’ll give it a go with a custom application here and come back to you with the result.

Thanks
Yves

3

Thank you for the reply!

I also just noticed I said the error was “linear” when I meant “constant”. For example, when my tags are 0 meters apart I’m calculating 75 meters, 10 meters apart, I’m calculating 85 m, 25m -> 100m, etc…

To me, this seems indicative of a single constant value I have wrong, like the antenna delay. Are there any other configuration parameters which contribute to the RMARKER timestamps I could have wrong that might lead to this? I don’t know much about the LDE algorithm, etc

4

Hi, I think I discovered an issue in my TDMA algorithm here related to imperfect time sync between anchors. See here:

https://www.decawave.com/decaforum/showthread.php?tid=760&pid=2164#pid2164

I’m investigating whether it’s possible for the RX or TX timestamps to be incorrect if we clear write the SYS_CTRL register (TRXOFF, RXENAB, etc) BEFORE actually reading the RX_TIME or TX_TIME register.

What events would cause the RX/TX timestamp become invalid?