Thank you for your support, Kelvin.
I assume no one is aware about that phenomenon if adding an ESL, an additional parallel capacitance is added. Probably there are some LtSPICE settings. On the other hand, a value, which is “not set” should have the behaviour being “not set” (with all consequences, i.e. not setting a resisitve value for the resistor → no simulation). However, I found the “issue” why I was not able to generate the attenuation plot (as I didn’t set the AC Attribute to the DC source)
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