JFET avalance properties, supercascode

I read the primer, and also the paper about the 40 kV supercascode and the current limited circuit breaker. However, this raised some questions.
Where do I find information about the mentioned UJN171K0Z? Or is it just similar to the UF3N170400B7S?
Forward gate current seems to be no big problem to the JFET, but what about reverse current? Does the gate-source diode go to avalance at a voltage <-30V with a certain peak current and power rating, or does it just kill like the gate of an IGBT? So if there may be some high impedance negative transients, do I have to implement any protection?
Why do the circuits in the supercascode papers care this much about symmetry? As I experienced, SiC FETs in general and also SiC JFETs have really good avalance properties (hovever seldom properly specified) so why care this much?

The UJN171K0Z is a SiC JFET chip. Sales of this chip can be arranged by a Sales manager in your location. Please contact Applications directly about that at PDS_SiC_Product_Applications@qorvo.com

The SiC JFET gate-source diode will avalanche between -45 to -55 V, depending on the part number. Avalanche of the gate-source diode will not destroy the part unless the energy is excessive. Protection in a supercascode circuit is unnecessary.

Symmetry is a concern for voltage balance, both static and dynamic. If the avalanche energy is within limits, then you can indeed simply allow the JFETs in a supercascode to avalanche.

Thanks, that helps to understand. Concerning the UJN171K0Z, it would just be nice to see a datasheet somewhere.