@Vikas2 , You want to modify the DMTH10H1M7STLWQ model from DIODES so that its gate charge curve can fit the datasheet, right? The gate charge profile is mainly associated with Cgs and Cdg in the MOSFET model. This MOSFET model employs a special circuit to represent the non-linear Cdg (where Cdg varies with Vdg), and two crucial components determining the Cdg profile are CGD and DCGD.
To adjust this model, you need to fine-tune CGS, CGD, and CJO in DCGD. I have employed a special technique in this example to sweep a parameter called idx, which sweeps through the entire set of values for CGS, CGD, and CJO. When idx is set to 1, their values correspond to the model’s default settings, while for idx equal to 2, adjustments are made to align with the datasheet. This help to show a comparison before and after tune.
By the way, if you are discussing tuning a model, it is a new topic. Next time, consider opening a new topic to make it easier to keep track of the discussion.
Hi
Just wanted to know whether we can create a test circuit for MOSFET leakage current parameters (IDSS and IGSS), or are these parameters limited only to physical measurement?
Hello,
I have a question regarding SPICE models for wide-bandgap power devices.
Are there any SPICE models available for GaN HEMTs or SiC MOSFETs that explicitly include trap effects (e.g., interface traps or buffer traps), rather than the standard manufacturer behavioral models?
Additionally: Are there any QSPICE simulation examples or reference circuits available for simulating dynamic (RDS(on) or other trap-related effects?
Any recommendations for models, example circuits, companies, or relevant would be greatly appreciated.
