dw1000 status

I read dw1000’s status every time after tag wake up from deepsleep, most of the time, dw1000’s status is equal to 0x800002, by about 10% chance, dw1000’s status is 0x2800002, I checked this bit in dw1000 user manual, and found some information as below:

CLKPLL_LL
reg:0F:00
bit:25
Clock PLL Losing Lock. This event status bit is set is set to indicate that the system’s digital
clock PLL is having locking issues. This should not happen in healthy devices operating in their
normal range. Its occurrence may indicate a bad configuration, a faulty part or a problem in
the power or clock inputs to the device. If this bit is set it may be advisable to turn off the
transmitter to avoid sending spurious signals. The CLKPLL_LL bit is cleared by writing a 1 to it.
Note: The PLLLDT bit in Register file 0x24:00 –EC_CTRL should be set to ensure reliable
operation of this CLKPLL_LL bit.

So the question is what’s the reason that cause Clock PLL Losing Lock?
thanks in advance!

Perhaps is due to reading the status too early. There is a time for stabilizing the clock. There is a figure in DW1000 manual version 2.10, page 18 (2.4 Power On Reset and then 2.4.1 SLEEP and DEEPSLEEP). Try using a delay before reading the status.