I created a code block where the parameters are initalized via SPICE .param statement. The block has two parameters and if the first parameter (2nd attribute) initalized via curly brackets, the second parameter (3rd attribute) is missing from the the generated code. The netlist seems OK, but only the first parameter is listed as input parameter in the code.
I used curly brackets to initialize the block parameters. This makes the difference.
I used curly brackets instinctively because if I use param defined value in a component curly brackets are needed (or at least accepted). Moreover when I pass parameter to a subcircuit element curly brackets are accepted too. I would say should be accepted the curly brackets here at code blocks too because of consistency.
Whitout curly brackets it works correctly as yours. Thank you for the example.
OK, I’ve made it more forgiving of the use of curly braces. Maybe someday people will stop using them, but I’m sure that’s a very long time off.
I have found a behavior which related to the curly brackets.
I made a rump up function wrapped into a symbol. First I tested it on the “implementation” schematic (ramp.qsch) and it worked as expected. Second I tested the qsch/qsym pair in a test schematic (ramp_test.qsch) and the test failed. Turned out the problem was I used round brackets around the PWL’s parameters. If I changed them to curly brackets the test was successful.
Moreover if I use curly brackets the PWL function tolerates the spaces around the + operator.
I do not know it is error or intended behavior, but it is interesting becasuse the round brackets are accepted, but I put the whole schematic a tier down it will be an error. This behavior related to the curly brackets topic so I decided to share it here maybe it is interesting for you.