Bug: Verilog stale generated .cpp file (Verilog "real" inputs always zero)

Originally I wasn’t sure what was going on, but I managed to isolate what appears to be a bug regarding the verilog related build process.

It would be nice if if was possible to copy-paste the version information from the about dialog for support requests… Anyway I’m on the revision with the latest message being 03/29/2024 Fixed a problem in diode current monitoring.

Since the forum software tells me that I can’t upload files as a new user, I’ve uploaded a zip file containing the project files reproducing the issue to a temporary file storage site: Temp.sh | stalebug.zip . The file will be available for 3 days.

The symptom: the “sample” input line is always zero, per the $display(sample) verilog debug statement used to log it to the console, despite it apparently being hooked up properly and everything - this is corroborated by the fact that deleting generated files causes a re-generation and then it works; the printed values become nonzero.

More specifically isolating the issue;
Deleting test_x1.cpp will cause it to be re-generated and will fix the issue. Inspecting the code, it can be seen that the missing input for the “sample” input gets added. For some reason, qspice did not update the code, and the symptom was really downstream of the root cause, namely; everything was fine but the cpp file was not rebuilt with updated inputs?

I’m just running on a normal windows system, no fancy filesystem stuff like network shares to mess with timestamps in case that’s used to check whether something should be rebuilt.

@qspc, probably you found what is a “feature”, not a bug. If you check the forum you get more info. There is a warning related to making changes in C++ or Verilog blocks. There is no automatic update mechanism, and when new input/output pins are added or modified, a new template form must be generated. There is no easy button here. The way it works, first you must make a copy of the old [.cpp] or [.v] files that will be modified. Then got through the process inside QSPICE schematic and create the new symbol blocks with whatever pins you need for input/output, and finally generate the new code files. Now open the backup copy and merge the new template with the old code, and finally, re-generate the DLL library.

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