I downloaded the design files for the WB003 and there seems to be a few missing, very important parameters, what is the substrate thickness and Dk values?
Also, there doesn’t seem to be any vias that link the left CPW GND with the bottom GND and right CPW GND. Should there not be some vias for this? The only via I get in the design files connects the monopole stub with the right CPW GND and bottom GND.
Using the stock files from the website (simulated in CST) I get an S11 min at 5.25 GHz (I thought resonance would center around 6.5 GHz), but I guessed the thickness of 0.93 mm and Dk of 4.1 based on the data sheet.
Also, should I extend the bottom ground plane on either side by a distance “d” to simulate the carrier PCB?